Parallel PCI
PCI Bus
The Conventional Parallel PCI core supports Target and Bus Mastering, along with Scatter Gather DMA transfers.

SI-FPGAIP-PCI: Overview
Sheldon Instruments offers a Conventional Parallel 32 bit PCI core with a highly efficient design architecture characterized by low resource utilization and low transmit and receive latencies.

For more demanding applications, Sheldon Instruments can custom design the interface to fit your needs, or provide technical support for those designing their own interfaces.

The PCI core interface is similar to using a parallel PCI to local bus bridge chip such as the PLX 90xx or AMCC 593x. The FPGA design, interface, and implementation are all simplified without the need for detailed input or output pin timing constraint requirements, no board level routing requirements, no additional power supplies, and one less device to procure and solder onto the board.

Key Features

  • 32 bit wide datapath, up to 66Mhz clock rate.
  • Supports auto configuration on power up, Target and Bus Master accesses.
  • Integrated DMA and Scatter Gather.
  • Core compatibility with Altera, Xilinx, and Lattice devices.
  • Software development kit that includes projects and related source code for Windows and Linux 32/64 bit applications and kernel mode device drivers.


FPGA IP
[table class=”siTB”]
Product, Description, Price (US dollars)
SI-FPGAIP-PCI, Parallel PCI Core, Call
[/table]