Host PCI bus to DSP Link
All communication between the host and the DSP take place by means of PLX’s PCI 9054 IC. Three (3) methods may be used for data transfer between the PCI bus and the DSP’s memory: 1) dual access mode, 2) PCI initiated bus mastered transfer mode with the 9054 acting as the bus master, and 3) bus mastering with the DSP acting as the PCI bus master.

For the dual access mode, all of the DSP’s zero wait state SRAM memory is simultaneously accessible by both the PCI bus and the DSP with the 9054 behaving as a target peripheral. The DSP’s memory is directly mapped into the first target region of the 9054, which can be accessed with standard memory access calls.

Onboard control logic arbitrates the appropriate timing between the C33’s primary bus, the SRAM, and the 9054’s Local bus. This is accomplished by asserting the C33 HOLD signal for no more than three (3) of its own clock cycles, every time the PCI side performs an access.

In addition to the dual access memory, large blocks of data can be transferred using PCI bus master transfers. The first bus master transfer method involves using the 9054’s DMA capabilities to access the DSP memory. The second bus master transfer method allows the DSP to act as the PCI bus master, where it actually has direct access to the host computer’s main memory! Both PCI bus master methods may allow for the highest possible burst transfer rates to take place over the PCI bus without host processor intervention.

Hardware Expansion
The SI-C33DSP-PCI includes expansion connectors allowing for custom designs, or for attaching ‘off the shelf’ multifunction I/O modules from Sheldon Instruments. Sheldon Instruments offers several daughter modules for multichannel analog and digital I/O, including 4 to 64 channels of 16 bit ADCs and DACs.

• Unmanned Aerial Vehicle Control Systems
• Industrial Control and Automation
• Additive Manufacturing
• Military and Aerospace
• Test and Measurement