IPCGuide

Overview

The SI implementation simplifies many of the details used in the TI implementations. Where as they cover multiple modules used in conjunction the SI implementation has condensed usage into to Models; The Message Queue Model and Notify Model. Some features have been removed and configurability has reduced in order to provide a light-weight, simple, and fast method for using the TI IPC hardware safely and effectively.

Notification Model

This model resembles the TI Notify model in that it uses interrupts to notify cores and allows for events to be associated with messages. Each core will run SI_IPC_Init(...). This will coordinate cores and set them up to use the Notify model. Each core can than call SI_IPC_RegisterEvent(...) for any event for which they'd like to register a callback function. These events will be linked to incoming messages. A sender must then simply call SI_IPC_Message(...) to send a message and interrupt to another core. The receiver will use the SI_IPC_Isr(..) to handle the interrupt and call the appropriate function for the message received.

Each core will call init and a single function for each send and receive is needed. Receive requires only an register call for future automated responses to message events.

Example INIT

Int SI_IPC_Init(Int intNum, UInt eventCount, uint32_t msgAddress, uint32_t listAddress);

• This specifies this core will use an interrupt vector for notificarion, allocate events, using a local message address, and the list of message addresses will be listed at a shared list address

Int SI_IPC_RegisterEvent(UInt eventID, SI_FnCbck FnCbck);

• each receiver can then register a 'callback' function for each event ID they allocated

SEND

SI_IPC_Message(UInt remoteCoreID, UInt eventID, uint32_t msg);

• to send an adress specific the receiver core, event you'd wish to invoke, and the message you'd like to send.

Additional details can be found in SI_SIPC.c

Queue Model

The Message Queue model resembles the TI MessageQ model. Implemenation and usage also closely resemble the SI Notify model with some differences. As before each core will initialize the model. This implementation uses SI_IPC_InitQueue(...) for each core to set up a message queue and coordinate among the active cores. Each core will then use SI_IPC_QueueMessage(...) to send a message or SI_IPC_GetMessage(...) to read a message. This implementation uses a FIFO of size set by the user and messages are pushed and popped from a core's local FIFO as you see fit.

Each core will call init and a single function for each send and receive is needed. Receive and Send are as simple as a single function for use after initialization.

Example:

INIT

uint32_t SI_IPC_InitQueue(uint32_t msgCount, uint32_t listAddress)

• A shared list address is used to hold all local fifo locations
• msg count is benign and intended for future releases where fifo length is made dynamic

RECEIVE

uint32_t SI_IPC_QueueMessage(uint32_t remoteCoreID, uint32_t msg, uint32_t timeout)

• Supply the target core, message to send and number of attempts

SEND

uint32_t SI_IPC_GetMessage(uint32_t *msg, uint32_t timeout)

• Supply the a pointer to hold the message and the number of attempts to wait for a message

Additional details can be found in SI_SIPC.c

Notes

• The SI implementation requires very little configuration and setup.
• Usage is equally simple requiring minimal knowledge.
• The library is very lightweight and easily modifiable to fit the user's needs.
• The library written is fully functional as written providing both syncronous(Notify) and Asyncronous(Queue) methods for messaging.
• An example project is provided: SI_IPC.
• Both models require the use of 3 simple functions.

Example

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